Maxim’s redesigned DG/DG/DG analog switches now feature guaranteed low DG Improved, Dual, High-Speed Analog Switches. Data Sheet. Overview: Maxim’s redesigned DG/DG/DG analog switches now feature guaranteed low on-resistance matching between switches (2Ω max) and . The DG, DG and DG monolithic CMOS analog switches have TTL and CMOS compatible digital Details, datasheet, quote on part number: DG .
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The 44V maximum voltage range permits controlling 30VP-P signals. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci? Accordingly, datqsheet reader is cautioned to verify that data sheets are current before placing orders. Sample and Hold Circuits? These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Refer to Figure 1 for test conditions. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
An epitaxial layer prevents the latch-up associated with older CMOS technologies. The pinout is similar, permitting a standard layout to be used, choosing the switch function as needed.
The output of A2 is fed back to A3 and compared to the analog input eIN. Low Power Consumption PD. The analog switches are bilateral, equally matched for AC or bidirectional signals. CL includes fixture and stray capacitance. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. Peak Detector A3 acting as a comparator provides the logic drive for operating SW1.
One control signal selects the timing capacitor C1 or C2. For information regarding Intersil Corporation and its products, see web site http: Low charge injection simpli?
DG MAXIM Improved, Dual, High-Speed Analog Switches ChipFind Datasheet Archive |
Another one selects eIN or discharges the capacitor in preparation for the datzsheet integration cycle. Logic input waveform is inverted for switches that have the opposite logic sense. For load conditions, see Specifications. This allows C1 to charge up to the analog input voltage. Intersil semiconductor products are sold by description only.
Single or Split Supply Operation Applications? The system will therefore store the most positive analog input experienced. Limit forward diode current to maximum current ratings. Information furnished by Intersil is believed to be accurate and reliable.